Organic light emitting diodes (OLEDs) have attracted great attention for full-color flat-panel displays since the demonstration of efficient electroluminescent devices [1]. Due to electrical doping of the electron and hole transport layer with an intrinsic emission layer sandwiched in bewteen OLED, the devices have reached high performance and high luminance at low voltage.
In this paper, a physics based two dimensional (2-D) generic model of dual band mid wavelength and long wavelength infrared (MW-LW) photodetector based on HgCdTe has been reported. The paper discusses variants of the back-to-back diode structure, which allows the detected waveband to be selected simply without changing the polarity of the bias. The structure has been designed by exploiting 2D SILVACO software. A closed form model has been developed for electrical and optical characterization of the device. The model includes all the relevant material physics and solution of non-linear decoupled semiconductor transport and Poisson’s equations. The results obtained on the basis of numerical simulation have been validated with the reported analytical and experimental results by the others. Good agreement is found between both.
Q. How do I convert a value from one set of units into another? A. Use the DBINTERNAL CONVERT.UNITS command.
Meshing for process in ATHENA or electrical characterisation in ATLAS is one of the biggest challenges that a user faces. Poor meshing in both ATHENA and ATLAS can lead to simulation failures. Poor meshing can also lead to inaccurate electrical results, which is potentially even worse. The effect that the mesh can have on the electrical results has been illustrated in [1]. An optimum mesh will have a sufficient number of points to ensure accuracy yet it will not have an excessive number of points as this will lead to an increase in simulation time.
VICTORY Process, the 3D process simulator now includes a module for plasma etching. The module is designed to simulate plasma etching processes at the feature-scale size. The simulation in the reactor-scale region is out of the scope of VICTORY Process. All transport characteristics data (as functions of reactor parameters needed for the feature-scale simulation) are modeled by user definable C-functions and are supplied to the module. The plasma etching simulator shares many elements with the standard physical etching /deposition module such as:
The Silvaco C-Interpreter (SCI) allows convenient and flexible definition of physical models and material parameters via an ANSI standard C-language interface. The SCI uses sophisticated techniques to assemble user defined functions at run time, while maintaining fast execution time. ATLAS supports a wide range of SCI functions such as doping, composition fraction, defect density of state, temperature and composition dependent band parameters, as well as mobility, recombination and generation models.
The degradation of MOSFET devices having relatively thin oxide layers is generally accepted as being mainly associated with the depassivation of silicon dangling bonds at the Si/SiO2 interface. These dangling bonds are initially passivated during the fabrication process by heating in hydrogen or, more rarely, a deuterium environment. The interface trap density is typically reduced by two orders of magnitude by this passivation process, to around 1010cm-2 or even less[1].
Virtual Wafer Fab’s powerful range of optimizers are used to investigate and minimise the coupled switching losses of a TCAD IGBT and its clamping diode in a chopper circuit. It is shown that it is vital that the designer concurrently optimizes both the switching losses of the IGBT and the clamping diode in a single operation.
VICTORY Process is a 3D process simulation tool which employs the LevelSet technique for manipulating and deforming structures. The structure’s geometry is stored implicitly on the hierarchy of regular (constant mesh size along each direction) Cartesian meshes.
The trap states at the interface of Silicon with Silicon Dioxide are usually divided conceptually into interface states and fixed oxide charges [1]. These trap states can cause the degradation of the performance of devices such as MOSFETs, when they are stressed into a regime where hot carriers are significant. This degradation is usually permanent and occurs for stress times of the order of 103 seconds [2]. This phenomenon is well studied, and ATLAS has a degradation model for simulating these effects [3].