\n* CEA-DRT-LETI – CEA\/GRE, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France
\ncyrille.leroyer@cea.fr, gilles.lecarval@cea.fr
\n** CEA-DRFMC, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France
\nmarc.sanquer@cea.fr
\n<\/em><\/p>\n
The following article, by Le Royer, C., Le Carval, G., Sanquer, M.: SET Accurate Compact Model for SET-MOSFET Hybrid Circuit Simulation. In: Wachutka, G., Schrag, G. (eds.), Simulation of Semiconductor Processes and Devices 2004. Wien – New York: Springer. 2004 (http:\/\/www.springer.at\/main\/book.jsp?bookID=3-211-22468-8), demonstrates the flexibility of\u00a0SmartSpice<\/em><\/strong>\u00a0used with its module\u00a0Verilog-A<\/em><\/strong>\u00a0in the simulations of SET circuits and hybrid SET-MOSFET circuits.<\/p>\n Abstract<\/strong><\/p>\n Single-Electron Transistors (SETs) [1][2] are attractive candidates for post-CMOS VLSI ICs. Accurate models are also required in order to efficiently design SET circuits and hybrid circuits. We have developed a new physical compact model of SET [3][4], which enables the accurate simulation of SET circuits and hybrid circuits in a SPICE-like environment. We show advanced examples of applications of our approach: simulations of elementary circuits which functionalities have been experimentally demonstrated in the literature [5][6].<\/p>\n 1 Introduction<\/strong><\/p>\n SETs have attracted much attention because of their low power consumption and small size [1][2][7]. Recent works [5][6] show that Single-Electron Transistors could enable innovative functionalities if they are associated with MOSFETs. However Monte-Carlo (MC) simulation [8] is not adapted to the analysis and the optimization of realistic logic circuits with a large number of devices (MOSFETs and SETs).<\/p>\n In this paper, we propose a compact physically based SET model, describing SET characteristics accurately over a wide range of temperature and voltages [4]. Our approach is simpler and more efficient than those presented in the literature [9][10]. Our model has been validated in static and dynamic regimes [4], at both device and logic circuit levels, by comparison with the MC simulator SIMON [8].<\/p>\n 2 SET Modeling<\/strong><\/p>\n Our model is derived on the basis of the \u201corthodox\u201d theory of single charge tunnelling and the master equation method [1][2]. The number of elementary charges e in the SET island (Figure 1.a) is supposed to be n = -1, 0 or +1. This model (detailed elsewhere [4]) is built on this assumption and the periodicity of the current IDS<\/sub>(VGS<\/sub>) : the average IDS<\/sub>\u00a0current (Figure 2.b) is determined as a function of the VDS<\/sub>\u00a0and VGS<\/sub>\u00a0voltage, the temperature and the offset charges, q0<\/sub>.<\/p>\n Single-Electron Transistors (SETs) [1][2] are attractive candidates for post-CMOS VLSI ICs. Accurate models are also required in order to efficiently design SET circuits and hybrid circuits<\/p>\n","protected":false},"author":3,"featured_media":22553,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7570],"tags":[],"class_list":["post-29255","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-simulation-standard","entry","has-media"],"_links":{"self":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29255","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/comments?post=29255"}],"version-history":[{"count":1,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29255\/revisions"}],"predecessor-version":[{"id":29260,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29255\/revisions\/29260"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media\/22553"}],"wp:attachment":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media?parent=29255"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/categories?post=29255"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/tags?post=29255"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}![\"\"](\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_oct_2004_a2.jpg\")
<\/p>\n","protected":false},"excerpt":{"rendered":"