{"id":29375,"date":"2003-07-01T21:27:56","date_gmt":"2003-07-01T21:27:56","guid":{"rendered":"https:\/\/silvaco-stage.betagentechnologies.com\/uncategorized\/behavioral-modeling-of-pll-using-verilog-a-with-smartspice\/"},"modified":"2021-07-08T18:35:39","modified_gmt":"2021-07-09T01:35:39","slug":"behavioral-modeling-of-pll-using-verilog-a-with-smartspice","status":"publish","type":"post","link":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/behavioral-modeling-of-pll-using-verilog-a-with-smartspice\/","title":{"rendered":"Behavioral Modeling of PLL Using Verilog-A with SmartSpice"},"content":{"rendered":"<h1>Behavioral Modeling of PLL Using Verilog-A with SmartSpice<\/h1>\n<h3>Introduction<\/h3>\n<p>In this article, we describe practical behavioral modeling for highly non-linear circuits using Verilog-A, which is analog extension of Verilog-AMS. At first, we describe behavioral modeling techniques for phase\/frequency detectors (PFD) and voltage-controlled oscillators (VCO) those are essential part of phase-locked loop systems shown in Figure.1. Model parameter extraction techniques are described and demonstrated later. Finally, these models are simulated with SmartSpice and verified against the results of transistor circuit simulations.<\/p>\n<p><img loading=\"lazy\" width=\"1344\" height=\"1669\" src=\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2.jpg\" class=\"cleaned-enfold-image\" alt=\"\" decoding=\"async\" loading=\"lazy\" srcset=\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2.jpg 1344w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-242x300.jpg 242w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-829x1030.jpg 829w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-768x954.jpg 768w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-1237x1536.jpg 1237w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-1208x1500.jpg 1208w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-568x705.jpg 568w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-30x37.jpg 30w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-44x55.jpg 44w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jul_2003_a2-39x48.jpg 39w\" sizes=\"auto, (max-width: 1344px) 100vw, 1344px\" \/><\/p>\n","protected":false},"excerpt":{"rendered":"<p>In this article, we describe practical behavioral modeling for highly non-linear circuits using Verilog-A, which is analog extension of Verilog-AMS. At first, we describe behavioral modeling techniques for phase\/frequency detectors (PFD) and voltage-controlled oscillators (VCO) those are essential part of phase-locked loop systems shown in Figure.1. Model parameter extraction techniques are described and demonstrated later. Finally, these models are simulated with SmartSpice and verified against the results of transistor circuit simulations.<\/p>\n","protected":false},"author":2,"featured_media":21986,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7570],"tags":[],"class_list":["post-29375","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-simulation-standard","entry","has-media"],"_links":{"self":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29375","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/comments?post=29375"}],"version-history":[{"count":1,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29375\/revisions"}],"predecessor-version":[{"id":29380,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29375\/revisions\/29380"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media\/21986"}],"wp:attachment":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media?parent=29375"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/categories?post=29375"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/tags?post=29375"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}