{"id":29666,"date":"1999-06-01T17:46:52","date_gmt":"1999-06-01T17:46:52","guid":{"rendered":"https:\/\/silvaco-stage.betagentechnologies.com\/uncategorized\/maverick-hierarchcal-full-chip-extractor-recent-significant-advances\/"},"modified":"2021-07-08T18:45:47","modified_gmt":"2021-07-09T01:45:47","slug":"maverick-hierarchcal-full-chip-extractor-recent-significant-advances","status":"publish","type":"post","link":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/maverick-hierarchcal-full-chip-extractor-recent-significant-advances\/","title":{"rendered":"Maverick- Hierarchcal Full-Chip Extractor Recent Significant Advances"},"content":{"rendered":"<h1><i>Maverick<\/i>&#8211; Hierarchcal Full-Chip Extractor Recent Significant Advances<\/h1>\n<p class=\"feature\">Introduction<\/p>\n<p><b><i>Maverick<\/i><\/b>\u00a0is a sophisticated full chip hierarchical netlist extractor [1]. It augments the existing\u00a0<b><i>CELEBRITY<\/i><\/b>\u00a0framework which includes state-of-the-art software for VLSI layout editing, hierarchical design rule checking and layout versus schematic comparison. The latest release of\u00a0<b><i>Maverick<\/i><\/b>\u00a0is equipped with many new interface features, including the ability to search for a net by name, and new engine upgrades, such as extraction of parameters of active devices. A new numerical procedure has been developed for resistance extraction of complex geometrical shapes.<\/p>\n<p class=\"feature\">Parameter Extraction<\/p>\n<p>An important feature of any netlist extractor is the ability to accurately report geometrical active device parameters to the netlist.<\/p>\n<p>For MOS technology,\u00a0<b><i>Maverick<\/i><\/b>\u00a0provides channel length (<i>L<\/i>), channel width (W), drain diffusion area (<i>AD<\/i>), source diffusion area (<i>AS<\/i>), perimeter of the drain junction including the channel edge (<i>PD<\/i>), perimeter of the source junction including the channel edge (<i>PS<\/i>).<\/p>\n<p>For diodes, extraction is performed for the area of the diode (<i>AREA<\/i>) and perimeter of junction (<i>PJ<\/i>).<\/p>\n<p>For capacitors,\u00a0<b><i>Maverick<\/i><\/b>\u00a0reports the capacitance combining inputs from the technology file with extracted geometries. To obtain the capacitance the technology file must include two technology constants: area capacitance (<i>AreaAttr<\/i>\u00a0in aF\/?m<sup>2<\/sup>) and perimeter capacitance per unit length (<i>PerimAttr<\/i>\u00a0in aF\/?m). These are supplied together with both layer names for the capacitor. A typical technology file input might be:<\/p>\n<blockquote><p><span style=\"font-family: Courier New, Courier, mono;\">Capacitance<\/span><\/p>\n<blockquote><p><span style=\"font-family: Courier New, Courier, mono;\">{<\/span><\/p>\n<p><span style=\"font-family: Courier New, Courier, mono;\">Layer1 = &#8220;Pin1&#8221;<\/span><\/p>\n<p><span style=\"font-family: Courier New, Courier, mono;\">Layer2 = &#8220;Pin2&#8221;<\/span><\/p>\n<p><span style=\"font-family: Courier New, Courier, mono;\">AreaAttr = 60<\/span><\/p>\n<p><span style=\"font-family: Courier New, Courier, mono;\">PerimAttr = 90<\/span><\/p>\n<p><span style=\"font-family: Courier New, Courier, mono;\">}<\/span><\/p><\/blockquote>\n<\/blockquote>\n<p><img loading=\"lazy\" width=\"1289\" height=\"1669\" src=\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1.jpg\" class=\"cleaned-enfold-image\" alt=\"\" decoding=\"async\" loading=\"lazy\" srcset=\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1.jpg 1289w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-232x300.jpg 232w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-795x1030.jpg 795w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-768x994.jpg 768w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-1186x1536.jpg 1186w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-1158x1500.jpg 1158w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-544x705.jpg 544w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-29x37.jpg 29w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-42x55.jpg 42w, https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_1999_a1-37x48.jpg 37w\" sizes=\"auto, (max-width: 1289px) 100vw, 1289px\" \/><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Maverick\u00a0is a sophisticated full chip hierarchical netlist extractor [1]. It augments the existing\u00a0CELEBRITY\u00a0framework which includes state-of-the-art software for VLSI layout editing, hierarchical design rule checking and layout versus schematic comparison. The latest release of\u00a0Maverick\u00a0is equipped with many new interface features, including the ability to search for a net by name, and new engine upgrades, such as extraction of parameters of active devices. A new numerical procedure has been developed for resistance extraction of complex geometrical shapes.<\/p>\n","protected":false},"author":5,"featured_media":21992,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7570],"tags":[],"class_list":["post-29666","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-simulation-standard","entry","has-media"],"_links":{"self":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29666","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/comments?post=29666"}],"version-history":[{"count":1,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29666\/revisions"}],"predecessor-version":[{"id":29671,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/posts\/29666\/revisions\/29671"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media\/21992"}],"wp:attachment":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/media?parent=29666"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/categories?post=29666"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ja\/wp-json\/wp\/v2\/tags?post=29666"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}