{"id":31148,"date":"2004-06-01T00:07:26","date_gmt":"2004-06-01T00:07:26","guid":{"rendered":"https:\/\/silvaco-stage.betagentechnologies.com\/%eb%b6%84%eb%a5%98%eb%90%98%ec%a7%80-%ec%95%8a%ec%9d%8c\/parasitic-capacitance-extraction-with-hipex-and-exact\/"},"modified":"2021-07-16T21:52:17","modified_gmt":"2021-07-17T04:52:17","slug":"parasitic-capacitance-extraction-with-hipex-and-exact","status":"publish","type":"post","link":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/parasitic-capacitance-extraction-with-hipex-and-exact\/","title":{"rendered":"Parasitic Capacitance Extraction with Hipex and Exact"},"content":{"rendered":"<h1>Parasitic Capacitance Extraction with Hipex and Exact<\/h1>\n<p class=\"feature\"><strong>Overview<\/strong><\/p>\n<p>To extract parasitic capacitances from a circuit layout, you need to perform the following steps:<\/p>\n<ol>\n<li class=\"regular\">Define the technology process and material data. This includes vertical order of mask layers and dielectrics, their thicknesses, conductivity, and permittivity constants.<\/li>\n<li class=\"regular\">Use the technology data as input to a 2D or 3D field solver to obtain capacitance coefficients.<\/li>\n<li class=\"regular\">Generate a rule file for a full-chip capacitance extractor using the obtained capacitance coefficients.<\/li>\n<li class=\"regular\">Run the capacitance extractor using the generated rule file.<\/li>\n<\/ol>\n<p>Silvaco provides tools for performing all the steps above. You can use\u00a0<strong><em>EXACT<\/em><\/strong>\u00a0for steps from 1 to 3 and\u00a0<strong><em>HIPEX-C<\/em><\/strong>\u00a0for step 4.<\/p>\n<p><em><strong>EXACT<\/strong><\/em>\u00a0is a 3D field solver powered by a 3D process simulator to accurately represent the cross-sections in the physical chip, rather than using square cross-sections. This maximizes the accuracy of the capacitance coefficients because the calculated capacitance is derived from realistic cross-sections and 3D shapes. See [1] for more information.<\/p>\n<p><em><strong>HIPEX-C<\/strong><\/em>\u00a0is a full-chip parasitic capacitance extractor. It is a part of the\u00a0<strong><em>HIPEX<\/em><\/strong>\u00a0full-chip extractor, which also includes the layout netlist extractor,\u00a0<strong><em>HIPEX-NET<\/em><\/strong>, and the parasitic RC extractor,\u00a0<strong><em>HIPEX-RC<\/em><\/strong>.\u00a0<strong><em>HIPEX-C<\/em><\/strong>\u00a0works with a stripe database produced by\u00a0<strong><em>HIPEX-NET<\/em><\/strong>. This database divides the original layout into stripes making parallel processing possible. The stripes also make it easier to process huge layouts on a single host machine, one stripe at a time.\u00a0<strong><em>HIPEX-C<\/em><\/strong>\u00a0is a fast 2D extractor. It uses third-party coefficients to derive capacitance from the extracted parameters of parasitic area, length, and distance. See [2\u20133] for more information.<\/p>\n<p><img loading=\"lazy\" width=\"644\" height=\"800\" src=\"https:\/\/silvaco-stage.betagentechnologies.com\/wp-content\/uploads\/simulationstandard\/simstd_jun_2004_a2-e1611194870718.jpg\" class=\"cleaned-enfold-image\" alt=\"\" decoding=\"async\" loading=\"lazy\" \/><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Overview<\/p>\n<p>To extract parasitic capacitances from a circuit layout, you need to perform the following steps:<\/p>\n","protected":false},"author":3,"featured_media":22035,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7486],"tags":[],"class_list":["post-31148","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-simulation-standard-ko","entry","has-media"],"_links":{"self":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/posts\/31148","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/comments?post=31148"}],"version-history":[{"count":1,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/posts\/31148\/revisions"}],"predecessor-version":[{"id":31153,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/posts\/31148\/revisions\/31153"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/media\/22035"}],"wp:attachment":[{"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/media?parent=31148"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/categories?post=31148"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/silvaco-stage.betagentechnologies.com\/ko\/wp-json\/wp\/v2\/tags?post=31148"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}